[세미나] Adaptive Mode Control A Static-Power-Efficient Cache Design

본자료는 삼성전자의 저작물이며 저작권자의 동의없이 무단 복제, 배포하거나 임의로 사용할 수 없음 Adaptive Mode Control : A Static-Power-Efficient Cache Design Outline Introduction DRI cache and Cache line decay Supplementary Adaptive Mode Control AMC Cache Architecture Adaptive Mechanism Review of SRAM Cell with Sleep Mode Capability Simulation Environment Result AMC Instruction Cache AMC Data Cache AMC I-cache and D-cache Sense interval, performance factor, and LIC update interval Conclusions Introduction (1) ...